- PROC CPUINFO VIRTUALIZATION GENERATOR
- PROC CPUINFO VIRTUALIZATION FULL
misalignsse: indicates if a general-protection exception (#GP) is generated when some legacy SSE instructions operate on unaligned data.cmp_legacy: If yes HyperThreading not valid.lahf_lm: Load AH from Flags (LAHF) and Store AH into Flags (SAHF) in long mode.More extended AMD flags: CPUID level 0x80000001, ecx
PROC CPUINFO VIRTUALIZATION GENERATOR
rng_en: Random Number Generator enabled. rng: Random Number Generator present (xstore). VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001 rdrand: Read Random Number from hardware random number generator instruction. xsave: Save Processor Extended States: also provides XGETBY, XRSTOR, XSETBY. aes/ aes-ni: Advanced Encryption Standard (New Instructions). popcnt: Return the Count of Number of Bits Set to 1 instruction ( Hamming weight, i.e. movbe: Move Data After Swapping Bytes instruction. vmx: Hardware virtualization: Intel VMX. monitor: Monitor/Mwait support ( Intel SSE3 supplements). pclmulqdq: Perform a Carry-Less Multiplication of Quadword instruction - accelerator for GCM). pni: SSE-3 (“ Prescott New Instructions”). See also Wikipedia and table 2-26 in Intel Advanced Vector Extensions Programming Reference Intel-defined CPU features, CPUID level 0x00000001 (ecx) mce_recovery: CPU has recoverable machine checks. tsc_known_freq: TSC has known frequency. nonstop_tsc_s3: TSC doesn't stop in S3 state. extd_apicid: has extended APICID (8 bits). cpuid: CPU has CPUID instruction itself. nonstop_tsc: TSC does not stop in C states. tsc_reliable: TSC is known to be reliable. xtopology: cpu topology enum extensions. acc_power: AMD accumulated power mechanism. arch_perfmon: Intel Architectural PerfMon. constant_tsc: TSC ticks at a constant rate. Transmeta-defined CPU features, CPUID level 0x80860001 3dnow: 3DNow! (AMD vector instructions, competing with Intel's SSE1). lm: Long Mode ( x86-64: amd64, also known as Intel 64, i.e. rdtscp: Read Time-Stamp Counter and Processor ID. pdpe1gb: One GB pages (allows hugepagesz=1G). syscall: SYSCALL (Fast System Call) and SYSRET (Return From Fast System Call). See also Wikipedia and table 2-23 in Intel Advanced Vector Extensions Programming Reference pbe: Pending Break Enable (PBE# pin) wakeup supportĪMD-defined CPU features, CPUID level 0x80000001. ia64: Intel Itanium Architecture 64-bit (not to be confused with Intel's 64-bit x86 architecture with flag x86-64 or "AMD64" bit indicated by flag lm). 
tm: Automatic clock control (Thermal Monitor).
acpi: ACPI via MSR (temperature monitoring and clock speed modulation). dts: Debug Store (buffer for debugging and profiling instructions). cmov: CMOV instructions (conditional move) (also FCMOV). pge: Page Global Enable (global bit in PDEs and PTEs). cx8: CMPXCHG8 instruction (64-bit compare-and-swap). pae: Physical Address Extensions (support for more than 4GB of RAM). msr: Model-Specific Registers (RDMSR, WRMSR). pse: Page Size Extensions (4MB memory pages). fpu: Onboard FPU (floating point support). See also Wikipedia and table 2-27 in Intel Advanced Vector Extensions Programming Reference Intel-defined CPU features, CPUID level 0x00000001 (edx) PROC CPUINFO VIRTUALIZATION FULL
The full listing is in the kernel source, in the file arch/x86/include/asm/cpufeatures.h. Most of the other features are only of interest to compiler or kernel authors.
a hypervisor (announced as such)? hypervisor. Hardware virtualization (VMX/AMD-V)? vmx (Intel), svm (AMD). In other words, your workstation, laptop or server.) FAQ: Do I have…
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